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Cores [clear filter]
Tuesday, September 15
 

10:00am CDT

IBM's POWER10 Processor - William Starke & Brian W. Thompto, IBM
POWER10 is IBM's next generation POWER micro-processor focused on enterprise computing. This talk will describe many of the new innovations and capabilities of POWER10 that build upon the strengths of recent generations and provide flexibility for the enterprise cloud.  POWER10 is fabricated using Samsung 7nm technology. It features a new core microarchitecture focused on energy efficiency, thread strength, increased SIMD execution capabilities, and instruction set enhancements targeted toward AI optimization. It also provides a substantial data plane bandwidth increase coupled with next generation OpenCAPI accelerator attach and Open Memory Interface (OMI) capabilities. A modular packaging architecture enables a broad range of deployments optimized for socket throughput, thread strength, cost, and scale. The PowerAXON high bandwidth, low latency, multi-protocol link architecture combines with numerous scaling architecture enhancements to provide robust large system characteristics and with scale-out system architectures to provide disaggregated memory clustering capabilities.

Continue the conversation in Slack.

Speakers
avatar for William Starke

William Starke

Distinguished Engineer, IBM
William Starke is an IBM Distinguished Engineer currently serving as the Chief Architect for the POWER10 microprocessor. Since graduating from Michigan Tech University, Bill has been employed by IBM for three decades in several roles, spanning mainframe and Power systems performance... Read More →
avatar for Brian W. Thompto

Brian W. Thompto

Distinguished Engineer, IBM
Brian W. Thompto is an IBM Distinguished Engineer based in Austin, TX. He is the chief core architect for IBM POWER servers and recently led the architecture and design of the processor core for POWER10, IBM's next generation server. He has over 20 years of experience leading global... Read More →



Tuesday September 15, 2020 10:00am - 10:30am CDT
Track 1

1:20pm CDT

A2I Explored - Bill Flynn, IBM
The market tested A2I POWER processor core RTL and associated FPGA implementation were recently open sourced in June 2020.  This presentation will describe the utility of the AXI bus as a key enabler for low-cost edge of network solutions. In addition, a practical approach to current ISA compliance will be described as well as the benefits of the released FPGA capabilities as a suitable starting point for 3rd party engagement.

Continue the conversation in Slack

Speakers
BF

Bill Flynn

Core Architect, IBM
Bill Flynn is an Open Power Core Architect in Austin, TX.  He graduated with a BS in Computer Science from Michigan State University and a MS in Computer Science from Syracuse University.  Bill has worked on the development of S/370, AS/400, Blue Gene and x86 systems.  He has made... Read More →



Tuesday September 15, 2020 1:20pm - 1:50pm CDT
Track 1
  Cores
  • See Session Slides Yes

1:55pm CDT

IBM open sources the A2O Core! - Bill Flynn, IBM
An out of order, single thread optimized core derived from the highly scalable in order commercially proven A2I core will be described.  The design leverages the same tightly coupled AXU accelerator interface as A2I.  An overview of key microarchitecture and features and a brief description of cost/power benefits when implemented in the 7nm technology will be offered.  Finally, a description of the associated FPGA environment and simple how to video will be shown.

Continue the conversation in Slack

Speakers
BF

Bill Flynn

Core Architect, IBM
Bill Flynn is an Open Power Core Architect in Austin, TX.  He graduated with a BS in Computer Science from Michigan State University and a MS in Computer Science from Syracuse University.  Bill has worked on the development of S/370, AS/400, Blue Gene and x86 systems.  He has made... Read More →



Tuesday September 15, 2020 1:55pm - 2:25pm CDT
Track 1
  Cores
  • See Session Slides yes

2:55pm CDT

Building Cache Coherent, Heterogeneous-ISA Processors Using P-Mesh - Jonathan Balkind, University of California, Santa Barbara
P-Mesh is the manycore cache coherence system underlying the OpenPiton research platform, which originally used the SPARCv9 ISA. A number of extensions to P-Mesh were needed to build the Bring Your Own Core (BYOC) platform, which added support for building heterogeneous-ISA processors made of cores of new, open ISAs like OpenPOWER. In this talk, Jonathan will introduce P-Mesh and the changes made to turn it into an ISA-agnostic memory system. Jonathan will detail the specific changes needed to support different ISAs, the new Transaction-Response Interface (TRI) for connecting cores, and initial efforts to support cores using the OpenPOWER ISA. Jonathan will also discuss efforts to connect multiple cores of different ISAs to build a single heterogeneous-ISA system.

Continue the conversation in Slack

Speakers
avatar for Jonathan Balkind

Jonathan Balkind

Assistant Professor, University of California, Santa Barbara
Jonathan Balkind is an Assistant Professor in the Department of Computer Science at the University of California, Santa Barbara. His research interests lie at the intersection of Computer Architecture, Programming Languages, and Operating Systems. He is the Lead Architect of OpenPiton... Read More →



Tuesday September 15, 2020 2:55pm - 3:25pm CDT
Track 1
  Cores  ISA
  • See Session Slides yes

3:30pm CDT

Microwatt and GHDL - An Open Hardware CPU written in VHDL, Synthesized with Open Source Tools - Anton Blanchard, IBM & Tristan Gingold, CERN
Microwatt is a 64 bit POWER OpenISA soft processor, written in VHDL. Over time it has grown from supporting Micropython, to Zephyr and most recently Linux.

From its original inception, Microwatt has relied heavily on GHDL, the Open Source VHDL simulator. GHDL has very recently added synthesis support and together with Yosys and Nextpnr allows for a completely open source toolchain for FPGAs.

This presentation will give an overview of the Microwatt core. It will also include an overview of GHDL and how it can be used for both simulation and synthesis of a medium complexity VHDL project.

Continue the conversation in Slack

Speakers
avatar for Anton Blanchard

Anton Blanchard

Distinguished Engineer, IBM
Anton has been involved with Linux and Open Source Software for over 20 years, much of that time with IBM. He leads a worldwide team dedicated to using Open Source technologies to build better products. In mid 2019he got the Open Hardware bug as a result of IBM's opening up of the... Read More →
avatar for Tristan Gingold

Tristan Gingold

Hardware Engineer, CERN
Tristan Gingold has developed GHDL, the main open-source VHDL simulator, for about 20 years. He is currently working at CERN in the hardware and timing section.



Tuesday September 15, 2020 3:30pm - 4:00pm CDT
Track 1
  Cores  Silicon Dev
  • See Session Slides yes

4:05pm CDT

The LibreSOC Initiative: A hybrid CPU/VPU/GPU - Luke Leighton, LibreSOC
LibreSOC is a hybrid CPU, VPU and GPU that is to be free of DRM and spying backdoor coprocessors, and to be libre licensed to the bedrock. To engender business and end-user trust the design is being developed fully transparently following best Libre Development practices, aims for full coverage with Formal Correctness Proofs, first class documentation suitable for both educational engagement as well as customer and developer support, and to act as a Reference and experimental Platform for exploration of advanced 3D and Video extensions to the Power ISA, under the guidance and mentorship of the OpenPOWER Foundation. With EUR 350,000 funding from NLNet under their Privacy and Enhanced Trust Programme, LibreSOC's first target is a 180nm test ASIC, as a first step on a roadmap that includes a Quad Core SoC suitable for use in tablets, netbooks and the SBC Industrial markets.



Speakers
avatar for Luke Leighton

Luke Leighton

Lead Architect, LibreSOC
Luke Leighton is an advocate for Libre Ethical Technology. First known for the network reverse engineering that brought Samba its NT Domain interoperability, he has witnessed Open Source Software move into commercial applications that left users with no control over their own legitimately... Read More →



Tuesday September 15, 2020 4:05pm - 4:35pm CDT
Track 1
  Cores
  • See Session Slides yes
 
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